The present invention pertains to an interface circuit for a printer that transmits and receives signals between a printer and a host computer. In particular, it pertains to an interface circuit for a printer that can prevent erroneous operation when power is input.
In a printer that prints a prescribed figure or character information on a printing paper in accordance with control signals and data from a computer, a control circuit for controlling each part of the printer and an interface circuit (input and output circuit) for inputting and outputting signals are installed. For example, the interface circuit has an input and output function that transmits a state signal showing a printer state to the computer, receives control signals and the data from the computer, and transfers them to the control circuit, etc.
Currently, as such an interface circuit, a system called an IBM-PC compatible parallel interface or centronics interface is generally adopted. In this system, asynchronous data transfer is carried out between a printer and a computer by so-called handshake control. In other words, the data transmission side first confirms whether not or the other party (reception side) is in a receivable state by checking the state of a specific signal line and transmits the data when it is confirmed that the reception side is in a receiving state. With such handshake control, a large amount of data can be transmitted and received without generating an overflow.
On the other hand, in the above-mentioned conventional interface circuit for a printer, due to scatter in the rise timing of power supply voltage when power for the printer is input, the computer side for transmitting data sometimes erroneously decides the printer state of the reception side. Thus, the data are transmitted in a state in which the printer side cannot be prepared for reception, so that an erroneous operation of the printer is caused or the printer cannot be controlled.
This will be explained by referring to the figures. FIG. 5 shows a constitutional example of an interface system including printer, printer cable, and computer. As shown in the figure, a printer 10 is connected to a computer 30 via a printer cable 20. In the printer 10, a control circuit 12 and an input and output circuit 14 are installed.
The control circuit 12 is a circuit for controlling the operation of each part of the printer 10. The input and output circuit 14 outputs control signals output from the control circuit 12 to the computer 30, receives control signal and data from the computer 30, and outputs them to the control circuit 12. For example, the control circuit 12 supplies a busy signal showing a printer state and/ack, which is a response signal to the computer, to the input and output circuit 14. On the other hand, the input and output circuit 14 transfers a strobe signal/STB transmitted from the printer cable to the control circuit 12 and further transfers data output from the computer to the control circuit 12. Also, as shown in the figure, the input and output circuit 14 supplies a power supply voltage VCC2 to the computer 30 via the printer cable.
As shown in the figure, for example, two power supply voltages VCC1 and VCC2 are supplied to the inside of the printer 10. Power supply voltage VCC1 is supplied to an IC circuit and is 3.3 V, for instance. Power supply voltage VCC2 is supplied to an interface part of a data bus and is 5.0 V, for instance. Power supply voltage VCC1 is supplied to both the control circuit 12 and the input and output circuit 14, the power supply voltage VCC2 is supplied to the input and output circuit 14. Since power supply voltages VCC1 and VCC2 are respectively generated by separate power supplies, scatter exists in the rise timing of these power supply voltages when power is input. In other words, power supply voltages VCC1 and VCC2 do not simultaneously rise to prescribed reference values but reach the reference values with a time interval.
The transmission and reception of data between the printer and the computer cannot operate normally due to scatter in the rise of power supply voltages VCC1 and VCC2. This will now be explained referring to FIG. 6.
FIG. 6 is a waveform diagram showing operation timing if the power supply voltage VCC2 rises first and the power supply voltage VCC1 then rises when power is input.
FIG. 6(a) shows a waveform of the power supply voltage VCC2 immediately after power input, and FIG. 6(b) shows a waveform of the power supply voltage VCC1. As shown in the figure, after power input, first, the power supply voltage VCC2 rises and is held at a prescribed reference value such as 5.0 V. The power supply voltage VCC1 rises later than VCC2 and is held at a prescribed reference value such as 3.3 V.
When the power supply voltage VCC2 reaches the reference value, an output buffer part of the input and output circuit is operated, and signal lines 21, 22, and 23 of the printer cable 20 are pulled up to almost the same level as the power supply voltage VCC2 by a pull-up resister of the input and output circuit 14. For this reason, a control signal for notifying the state of the printer 10 to the computer 30 (hereinafter, indicated as state signal) as BUSY and a response signal/ACK are held at the level of the power supply voltage VCC2, that is, a high level.
As illustrated in FIG. 6(b), the power supply voltage VCC1 rises at a time t1 that is slightly later than the rise time of the power supply voltage VCC2. Since the control circuit 12 is operated by the power supply voltage VCC1, as shown in FIG. 6(c), after the power supply VCC1 rises, the control signal busy and the response signal/ack are respectively pulled up to a high level (power supply voltage VCC1.
For this reason, as shown in FIG. 6(d), after the state signal BUSY and the response signal/ACK are pulled up to a high level (power supply voltage VCC2) by the input and output circuit 14, the control signal busy and the response signal/ack output from the control circuit 12 are still at low level for a prescribed period after the time t1. For this reason, the input and output circuit 14 pulls down the state signal BUSY and the response signal/ACK in accordance with these input signals.
When data for printing are transmitted, the computer 30 monitors the signal lines 22 and 23 of the printer cable 20, that is, monitors the state signal BUSY and the response signal/ACK being transmitted from the printer 10. If these signals are at low level, the computer decides that the printer is in a printing standby state (READY), pulls down the strobe signal/STB to a low level, and starts to transmit the data.
However, at that time, the printer is not yet in a printing standby state and cannot receive the data being sent from the computer 30. For this reason, a so-called hangup state is formed in which data communication of the computer 30 and the printer 10 is impossible, or the printer sometimes prints incorrect characters and figures.
Usually, as a correct sequence, after the power of the printer 10 is input, a printing command is implemented from the computer 30, and printing data are transmitted. However, this sequence is sometimes not followed. For example, there are also users who sense that power has still not been input into the printer 10 after the transmission of printing data from the computer 30 and turn on the power switch. In such an operation, in the printer 10, for example, as mentioned above, due to scatter of the operation timing of the power voltage supply circuit for supplying the power supply voltages VCC1 and VCC2, the power supply voltage VCC2 rises, and the power supply voltage VCC1 then rises. For this reason, as shown in FIG. 6(d), the state signal BUSY and the response signal/ACK are held at low level in accordance with the output signal busy and/ack of the control circuit 12 by the input and output circuit 14 of the printer 10. The computer 30 detects that the state BUSY and the response signal/ACK are at low level, recognizes that the printer is in a printing standby state, and starts to transmit printing data. In actuality, at that time, there is a possibility that the printer 10 cannot receive the printing data from the computer 30 during initialization processing after the power input and will enter into a hangup state.
The present invention considers such a situation, and its objective is to provide an interface circuit for a printer that can prevent transmission of an incorrect control signal when power is input into the printer, stabilizes the operation state of the printer in the initial state of power supply voltage rise, and can prevent erroneous operation.
In accordance with one aspect of the interface circuit of the present invention consists of a switching circuit having several selective output circuits, which input several input signals and one control signal and output an output signal corresponding to a logic level of the above-mentioned input signal in accordance with the logic level of the above-mentioned control signal or an output signal of a prescribed logic level, and a first logic circuit which outputs the above-mentioned control signal at a prescribed logic level for a prescribed period from the input of power.
Also, in accordance with an aspect of the invention, the logic circuit is appropriately a flip-flop or latch that inputs a power ON reset signal to its reset terminal.
Also, in accordance with an aspect of the invention, the switching control circuit has a second logic circuit that outputs a signal corresponding to a logic arithmetic result of the above-mentioned several input signals, and the output signal of the above-mentioned second logic circuit is supplied to a clock input terminal of the above-mentioned flip-flop or latch.
Furthermore, in accordance with an aspect of the present invention, appropriately, the above-mentioned switching control circuit has a noise suppression circuit that is installed between the above-mentioned second logic circuit and the above-mentioned first logic circuit and integrates and outputs the output signal of the above-mentioned second logic circuit.
Furthermore, the above-mentioned selective output circuit and the above-mentioned second logic circuit can be appropriately constituted by a NAND element.